This application is the national phase under 35 U.S.C. xc2xa7371 of PCT International Application No. PCT/JP97/02559 which has an International filing date of Jul. 24, 1997, which designated the United States of America.
1. Technical Field
The present invention relates to a field effect transistor, in particular, to a device structure of compound semiconductor field effect transistor for realizing higher efficiency and higher voltageproofness in high frequencies, and high output power operation and for realizing lower noises in high frequency, low noise operation.
2. Background Art
Devices made of a compound semiconductor such as GaAs have been used in various uses not realized by silicon devices. A superlattice structure wherein GaAs and AlGaAs very thin films are grown in layers is also used in compound semiconductor devices. Devices using superlattice structure include a high output power field effect transistor (FET) and a low noise high mobility transistor (HEMT). The superlattice structure is fabricated with epitaxial growth. For example, an AlGaAs/GaAs superlattice layer is formed as a buffer layer at an interface between a substrate and an epitaxial layer, to suppress propagation of crystalline dislocations from the substrate to the epitaxial layer and multiplication thereof, a good epitaxial layer can be fabricated.
A GaAs high output power FET is used in a high output power amplifier for communication at high frequencies equal to or higher than 1 GHz. Main factors in a GaAs high output power FET which limit the output power and the electric power addition efficiency in high frequency, high output power operation are self-multiplication due to ionization on collisions of free electrons in the GaAs material, current leakage down below the channel layer and current leakage at crystalline surfaces between the electrodes.
On the other hand, a low noise high mobility transistor is used in a low noise amplifier for communication at high frequencies equal to or higher than 10 GHz. In a low noise high mobility transistor, the electron transport characteristics of the channel layer is improved in order to improve noise characteristics. However, even if the characteristics of the channel layer is improved, free electrons leak below the channel due to short channel effect because a very small gate electrode has to be used. This limits reduction of noises.
A first object of the invention is to provide a high output power field effect transistor having improved overinputproofness, voltageproofness and efficiency.
A second object of the invention is to provide a field effect transistor having improved noise characteristics.
A first field effect transistor device according to the invention comprises a channel layer made of a compound semiconductor, a first compound semiconductor layer formed below the channel layer and having a higher resistance than the channel layer, and a second compound semiconductor layer formed below the first compound semiconductor layer and facilitating re-combination of carriers.
Preferably, the second compound semiconductor layer comprises a layer made of a material including aluminum, and oxygen is introduced in the material including aluminum. Because aluminum combines easily with oxygen, oxygen of high concentration can be mixed easily.
Preferably, the second compound semiconductor layer comprises a superlattice structure consisting of layers made of a plurality of different crystalline materials and at least a part of the layers facilitate the re-combination of carriers.
Preferably, the superlattice structure consists of layers made of a semiconductor crystalline material including aluminum and layers made of another semiconductor crystalline material without aluminum.
Preferably, the superlattice structure has a structure wherein AlxGa1xe2x88x92xAs (x greater than 0) layers and AlyGa1xe2x80x94yAs (x greater than yxe2x89xa70) layers are layered alternately, and oxygen concentration in the AlxGa1xe2x88x92xAs layers is in a range from 1*1017 to 2*1019 cmxe2x88x923, more preferably, in a range from 1*1018 to 7*1018 cmxe2x88x923.
Preferably, the second compound semiconductor layer comprises a layer wherein both of n-type and p-type dopants are mixed at about the same degree. The second compound semiconductor layer has a high resistance due to carrier compensation, to facilitate re-combination of carriers.
A second field effect transistor device according to the invention comprises a channel layer made of a compound semiconductor, a first compound semiconductor layer formed below the channel layer and having a higher resistance than the channel layer, and a second compound semiconductor layer formed below the first compound semiconductor layer and facilitating re-combination of carriers. The second compound semiconductor layer is a layer formed with crystal growth at a temperature lower than the channel layer. Due to crystal growth at a lower temperature, the crystalline property is deteriorated to enhance carrier re-combination rate.
Preferably, the second compound semiconductor layer is a layer formed with crystal growth at a temperature lower than that of the channel layer. Preferably, the second compound semiconductor layer is a layer formed with crystal growth at a temperature lower by 20 to 200xc2x0 C., more preferably, by 100 to 150xc2x0 C., than that of the channel layer. The second semiconductor layer comprises a superlattice structure consisting of a plurality of layers of different crystalline materials, and at least a part thereof are layers which facilitate re-combination-of carriers.